A phone-chip benchmark with no wattage figure pulled 777 points and 423 comments in a MrKeyoor snapshot of Hacker News. The number driving that attention was 15,221, a claimed Geekbench 6.5 multi-core score for Xiaomi's Xring O3. That would put a mobile system-on-chip near some laptop-class results. It also leaves out the measurement that decides whether the score belongs in a pocket: how much power the chip used, for how long, under what cooling.
The viral post from software-performance researcher Daniel Lemire said O3 roughly matches Apple's cores in single-threaded work and runs much faster in multi-threaded execution. It cited 3,945 single-core and 15,221 multi-core, along with 44 MB of total cache and Arm C1-Ultra cores that support SVE2 and SME2. Those are interesting architectural details. They do not turn a launch score into an independent device test.
That distinction is the story. Xiaomi has a credible custom-silicon program and a very large peak result. The public evidence available with the claim does not yet show sustained speed, energy per task, surface temperature, battery cost, or even a result page in Geekbench's public browser for the O3 device. Developers and buyers should read 15,221 as a target Xiaomi says it reached, pending reproducible retail measurements.
What Xiaomi is claiming
Chinese technology publication CNMO reported from Xiaomi's announcement that the company compared O3 with Apple's A19 Pro and its own O1. In that reported launch comparison, O3 scored 3,945 in Geekbench 6.5 single-core, against 4,019 for A19 Pro and 3,008 for O1. Its multi-core result was 15,221, compared with 11,054 for A19 Pro and 9,509 for O1. On those figures, O3 trails A19 Pro by about 1.8 percent in the single-core test and leads it by about 38 percent in multi-core.
The percentages explain the headline, but the core counts explain part of the gap. O3 is described as a ten-core design with six high-end cores and four other large cores. More cores can finish a benchmark's parallel work sooner when software keeps them occupied. Single-core performance asks a different question: how quickly one thread completes the benchmark's work. Calling one processor simply faster collapses those two tests into a claim neither one supports alone.
Geekbench itself describes its CPU suite as a collection of workloads intended to represent tasks such as file compression, navigation, image processing, code compilation, and machine learning. Its benchmark overview separates single-core and multi-core scores for that reason. The scores are useful for comparisons made with the same Geekbench version and similar test conditions. They are not direct measurements of battery life, heat, radio performance, GPU speed, or how an application behaves after several minutes.
There is another ambiguity in the phrase "Apple cores." Apple's current chips span phones, tablets, and computers with different core counts and thermal envelopes. The A19 Pro is the relevant phone comparison reported from Xiaomi's presentation. Apple's M5 Pro and M5 Max, by contrast, use up to 18 CPU cores in laptops. Apple describes those chips as six super cores plus 12 performance cores built for power-efficient multi-threaded work. A generic Apple comparison can make a phone result sound broader than it is.
The architecture is more interesting than the ranking
Xring O3 did not appear from nowhere. Xiaomi's first-generation Xring O1 shipped in 2025 as a 3-nanometer chip with a ten-core CPU and 16-core GPU. Xiaomi's O1 launch announcement placed it in the Pad 7 Ultra and described it as the company's own flagship system-on-chip. O3 is evidence that Xiaomi is continuing that program rather than treating O1 as a one-off demonstration.
The C1-Ultra name in the O3 discussion matters because it identifies Arm's high-performance mobile core design, rather than proving that Xiaomi created an entirely new CPU core instruction set. Arm's C1-Ultra specification lists Armv9.3-A, SVE2, SME2, up to 3 MB of private L2 cache per core, and a shared L3 configuration. Arm says a cluster can include C1-Ultra, C1-Premium, C1-Pro, and C1-Nano cores, giving chip designers room to choose different mixes of speed, area, and efficiency.
SME2 is especially relevant for local AI software. It adds matrix-oriented instructions to the CPU, allowing supported libraries to run parts of inference without sending every operation to a dedicated neural processor or GPU. Arm's own C1 material claims up to 25 percent better single-thread performance over Cortex-X925 and says its results came from internal testing. That attribution matters for Arm's numbers just as much as it does for Xiaomi's. Silicon vendors define the setup for launch tests; independent testing checks how the finished product behaves outside that setup.
SVE2 serves more general vector work, where one instruction operates across multiple data elements. Image filters, media codecs, cryptography, parsers, and numerical kernels can benefit when compilers or hand-tuned libraries generate the right instructions. Lemire's post focused on the width of the execution engine and the amount of cache because both can let a core keep more work in flight. The benefit depends on the code having enough independent operations and on data arriving quickly enough to feed them.
That is the developer consequence missed by a scoreboard reading. An Android application does not become 38 percent faster because one multi-core total is 38 percent higher. A serial dependency chain still leans on single-thread speed. A parallel job can run into memory bandwidth, synchronization, scheduler behavior, or thermal limits. An AI model may spend its time on the NPU or GPU instead of SME2. The hardware widens the available path; libraries, compilers, and workload shape decide how much software uses it.
The missing number is watts
Peak performance in a phone is constrained by a small chassis with no conventional fan. A processor can post a large score by running at a high voltage and frequency for a short test, then reduce clocks when temperature or battery limits intervene. The initial O3 claim provides no matched power curve for Xiaomi and A19 Pro, so it cannot answer which chip completes the same work with less energy.
A fair comparison needs more than one maximum. Testers should publish package power or clearly state which rails they measured, ambient temperature, cooling, software build, benchmark version, run count, and performance after repeated runs. A ten-minute loop would show whether 15,221 is stable or a brief burst. Energy for a fixed task would show whether the extra cores save battery by finishing quickly or consume more energy while active.
Retail hardware matters too. Xiaomi's launch score may come from a reference board whose cooling and power policy differ from a shipping phone. Firmware can change scheduling, voltage tables, memory timing, and thermal limits. The final device adds a display, modem, cameras, charging hardware, and a battery inside the same thermal budget. None of those invalidate a development-board result, but they limit what it predicts about a device a person can buy.
The absence of a public Geekbench result page is also worth watching. A browser entry would expose the software version, reported frequencies, device identifier, memory, and workload sub-scores. It still would not supply trustworthy wall power or a full thermal profile, but it would make the run easier to inspect and compare. For now, the number is being repeated mainly through Xiaomi's presentation and social posts, not a downloadable test record.
Xiaomi's score deserves attention because the company is on its second generation of high-end in-house mobile silicon and because 15,221 is an aggressive multi-core target. The next evidence should come from production devices: public benchmark records, repeated-run curves, measured power, and application tests that use SVE2 or SME2. If those measurements preserve most of the launch result inside a phone's normal thermal budget, O3 will have earned the comparison now being made for it. If the score falls sharply after the first run, 15,221 will describe a peak rather than everyday speed.